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Digital Logic Design

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2
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4.8k
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1
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a) Represent $(29)_{10}$ into excess-3 code and Gray code.
digital logic design updated 6.3 years ago by teamques10 ★ 70k
0
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1
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1.8k
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Perform the following directly without converting to any other base.
digital electronics digital logic design updated 6.3 years ago by teamques10 ★ 70k
0
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1
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1.6k
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1
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Perform the following directly without converting to any other base.
digital electronics digital logic design updated 6.3 years ago by teamques10 ★ 70k
0
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1
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4.8k
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1
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Compare TTL and CMOS with respect to speed, power dissipation, fan-in and fan-out.
digital logic design updated 7.1 years ago by teamques10 ★ 70k
3
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1
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30k
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mod 12 asynchronous counter using jk flip flop
digital logic design updated 7.2 years ago by teamques10 ★ 70k
0
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1
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7.4k
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Explain the working of differential amplifier?
digital logic design updated 7.2 years ago by teamques10 ★ 70k
0
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1
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7.5k
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1
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Explain collector to base bias circuit factor
digital logic design updated 7.2 years ago by teamques10 ★ 70k
1
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17k
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1
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Explain input and output characteristics of CE Confutations in BJT
digital logic design updated 7.2 years ago by teamques10 ★ 70k
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1
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1.0k
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1
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VHDL program Format ?
digital logic design updated 7.2 years ago by xoco • 0
1
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16k
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Design 4 bit ring counter using JK-FF draw the timing diagram for the same.
digital logic design updated 7.2 years ago by xoco • 0
5
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148k
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Implement a full adder circuit using two 4:1 multiplexers.
digital logic design updated 7.3 years ago by teamques10 ★ 70k
1
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1
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10k
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1
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Write short notes on parity generator
digital logic design updated 7.3 years ago by teamques10 ★ 70k
0
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1
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1.5k
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1
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Draw the truth table for full adder and realize using 3:8 decoder
digital logic design updated 7.3 years ago by teamques10 ★ 70k
0
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1
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53k
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1
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Find out relations between Alpha, Beta and Gama as current amplification factors for CE, CB, CC Configurations.
digital logic design updated 7.3 years ago by teamques10 ★ 70k
1
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9.4k
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Minimize the following expression using K-map also Implement the circuit using minimum number of gates.
digital logic design updated 7.3 years ago by teamques10 ★ 70k
0
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1.1k
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(Duplicate) Combinational and Sequential logic
digital logic design updated 7.9 years ago by ddigantarroy • 0
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1
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1.8k
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Question: Digital Logic Design & Analysis : Question Paper May 2017 - Computer Engineering (Semester 3) | Mumbai University (MU)
digital logic design updated 7.9 years ago by teamques10 ★ 70k
0
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1
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3.8k
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1
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Convert SR flip-flop to JK flip-flop and D flip-flop.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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2.6k
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1
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Explain 4 bit Universal shift register
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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20k
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1
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Design a logic circuit to convert Gray to BCD code.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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1.6k
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1
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Perform the following operations without changing the base.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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3.2k
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Convert $(47.3)_{10}$ BCD, Excess-3 and Gray code
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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2.0k
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1
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Convert $532.125_{8}$ into decimal, binary and hexadecimal.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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2.8k
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1
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Differentiate in brief between combination and sequential circuits.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
1
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1
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22k
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1
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Convert binary data 1010 into 7 bit even parity hamming code
digital logic design updated 8.9 years ago by teamques10 ★ 70k
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