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2.2k
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1
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What is shift register? Explain any one type of shift register. Give its application.
digital system design updated 4.8 years ago by teamques10 ★ 70k
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14k
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Write VHDL code for Fibonacci Series Generator.
digital system design updated 6.4 years ago by sushanth2071 • 0
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14k
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Write VHDL code for 3 bit up counter
digital system design updated 6.4 years ago by sushanth2071 • 0
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21k
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VHDL Code for Full Subtractor
digital system design updated 6.4 years ago by sushanth2071 • 0
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3.9k
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Differentiate between FPGA and CPLD
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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34k
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Explain Full Adder circuit using PLA having three inputs, 8 product terms and two outputs.
digital system design updated 6.4 years ago by sushanth2071 • 0
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8.3k
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Explain CPLD and FPGA
digital system design updated 6.4 years ago by sushanth2071 • 0
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1.7k
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1
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Convert T Flip Flop to D Flip Flop
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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7.0k
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1
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Explain Master Slave JK Flip Flop
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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2.8k
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Write a note on Universal Shift Registers
digital system design updated 6.4 years ago by sushanth2071 • 0
3
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19k
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Draw and explain 3 bit asynchronous binary counter using positive edge triggered JK flip flop. Draw the waveforms.
digital system design updated 6.4 years ago by sushanth2071 • 0
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129k
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Explain the working of 3 bit asynchronous counter with proper timing diagram
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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7.4k
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Explain the Johnson's Counter. Design for initial state 0110. From initial state explain and draw all possible states.
digital system design updated 6.4 years ago by sushanth2071 • 0
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5.7k
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What is shift register? Explain any one type of shift register. Give its applications OR What are shift registers? How are they classified? Explain working of any one type of shift register
digital system design updated 6.4 years ago by sushanth2071 • 0
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15k
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Convert JK Flip Flop to T Flip Flop
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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9.0k
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1
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Explain Mealy machine and Moore machine
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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2.2k
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1
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Explain SRAM and DRAM
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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1.9k
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1
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Compare PROM and EPROM
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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1.3k
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1
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Compare SRAM with DRAM
digital system design updated 6.4 years ago by sushanth2071 • 0
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1
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4.3k
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1
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Write a note on Magnitude Comparator
digital system design updated 6.4 years ago by sushanth2071 • 0
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3.3k
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1
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Write a note on Carry Look Ahead Adder
digital system design updated 6.4 years ago by sushanth2071 • 0
20
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1
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224k
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1
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State and prove Demorgan's theorem
digital system design updated 6.4 years ago by sushanth2071 • 0
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2.2k
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Minimize the following expression using Quine McClusky Technique
digital system design updated 6.4 years ago by sushanth2071 • 0
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1.6k
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Implement the Boolean function using 8:1 multiplexer
digital system design updated 6.4 years ago by sushanth2071 • 0
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5.0k
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Express F in SOP and POS form
digital system design updated 6.4 years ago by sushanth2071 • 0
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