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0
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1
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3.0k
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1
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Design a circuit with optimum utilization of PLA to implement following functions
digital circuits and design updated 3.9 years ago by phenjoisilab • 0
0
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1
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9.3k
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1
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Draw and explain the block diagram of architecture of XC9500 CPLD family.
digital circuits and design updated 3.9 years ago by krithikkm200 • 10
1
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1
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72k
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1
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Design MOD-8 asynchronous counter.
digital circuits and design updated 3.9 years ago by phenjoisilab • 0
0
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1
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2.3k
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1
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Analyze the sequential state machine shown in fig. Obtain the state diagram for the same
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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2.1k
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1
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Analyze the sequential state machine shown in fig. Obtain the state diagram for the same
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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2.4k
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1
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Identify indistinguishable state in following state table and obtain minimized state diagram
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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2.2k
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1
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Identify indistinguishable state in following state table and obtain minimized state diagram
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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23k
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1
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Construct 4 bit ring counter using IC 74194 and draw output waveform
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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2.1k
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1
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Analyze the sequential state machine shown in fig. Obtain the state diagram for the same
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
1
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1
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36k
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1
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Write short notes on: PAL AND PLA
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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12k
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1
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Discuss XC 9500 CPLD family architecture with neat block diagram. Describe main features.
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
1
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1
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12k
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1
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Write a short note on : i) K-map
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
1
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1
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8.2k
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1
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Write Short notes on: i) Noise margins
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
7
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1
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97k
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1
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Implement following questions using NAND gate only:
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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17k
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1
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Simplify following logic function and realize using NOR gate:
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
1
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1
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24k
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1
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Interfacing between CMOS and TTL
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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9.7k
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1
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Draw truth table and logic diagram of Full Subtractor
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
2
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1
answer
79k
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1
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Write short notes on: Master slave JK flip flop
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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45k
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1
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Convert T flip flop to D flip flop
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
1
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1
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11k
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1
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Write short notes: SR flip flop
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
4
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1
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125k
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1
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Design MOD 6 asynchronous counter and explain glitch problem
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
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1
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12k
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1
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Explain glitch problem of ripple counter along with waveform.
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
1
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1
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21k
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1
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Draw internal block diagram of IC 7490.
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
3
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1
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57k
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1
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Design a MOD 11 synchronous counter using T flip flop.
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
0
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1
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2.3k
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1
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Identify indistinguishable state in following state table and obtain minimized state diagram
digital circuits and design updated 4.0 years ago by krithikkm200 • 10
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