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Digital Logic Design

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2
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1
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94k
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1
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Explain in brief weighted and non-weighted codes with one example each.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
2
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59k
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Implement single digit BCD adder using 4-bit binary adder IC7483. Show the design procedure & explain its operation.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
2
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1
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40k
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Draw and explain the working of 4-bit ring counter with timing diagram
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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16k
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What is Modulus of the counter? For MOD-16 counter how many flip-flops are needed?
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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2.2k
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1
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Convert JK flip-flop into D-flip-flop and T-flip-flop(show only the design without steps).
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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7.4k
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1
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Explain the concept of comparator. Develop the truth table for 2-bit binary comparator & design it using a suitable decoder & additional gates.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
5
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1
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51k
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1
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Explain the race around condition in JK flip-flop. State various methods to overcome it.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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9.8k
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1
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Implement single digit BCD adder using 4-bit binary adder IC7483. Show the design procedure & explain its operation.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
answer
2.5k
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1
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Explain in brief weighted and non-weighted codes with one example each.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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2.2k
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1
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Convert binary data 1010 into 7 bit even parity hamming code
digital logic design updated 8.9 years ago by teamques10 ★ 70k
0
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1
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6.0k
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1
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Perform hexadecimal arithmetic operation: DADA+BABA.
digital logic design updated 8.9 years ago by teamques10 ★ 70k
4
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1
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54k
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1
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What is multiplexer tree? Construct 32:1 multiplexer using 8:1 multiplexer only. Explain how the logic on particular data line is steered to the output in this design with example.
digital logic design updated 9.0 years ago by sukadevsahu2 • 0
0
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1
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4.4k
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1
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Desing a 4-bit input (A,B,C,D) digital circuit that will give at its output(x) at logic 1 if binary number formed at the input beween 2 and 9 (including)
digital logic design updated 9.5 years ago by teamques10 ★ 70k
0
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1
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1.5k
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1
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justify and simplify the expression
digital logic design updated 9.5 years ago by teamques10 ★ 70k
0
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1
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3.0k
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1
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Details and comparison of FPGA and CPLD.
digital logic design updated 9.5 years ago by teamques10 ★ 70k
2
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1
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14k
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1
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Short note on - Difference between CPLD and FPGA
digital logic design updated 9.5 years ago by teamques10 ★ 70k
1
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1
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4.8k
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1
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What is FPGA. Explain basic architecture. What are its advantages over CPLD.
digital logic design updated 9.5 years ago by teamques10 ★ 70k
0
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1
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1.9k
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1
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Convert the following: i) SR to JK ii) JK to D iii) SR to D iv) JK to SR
digital logic design updated 9.5 years ago by teamques10 ★ 70k
0
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1
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8.0k
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1
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Working of Master-Slave J-K flip flop.
digital logic design updated 9.5 years ago by teamques10 ★ 70k
1
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1
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11k
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1
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Design a sequence generator for following sequence. Identify and check for lock out condition 0->3->5->6->0.
digital logic design updated 9.5 years ago by teamques10 ★ 70k
0
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1
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2.3k
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1
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Write short note on Ring Counter using 'D' FF.
digital logic design updated 9.5 years ago by teamques10 ★ 70k
1
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1
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4.9k
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1
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Short Note on: Johnson Ring Counter:
digital logic design updated 9.5 years ago by teamques10 ★ 70k
0
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1
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35k
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1
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Explain the Operation of 4-bit universal shift register.
digital logic design updated 9.5 years ago by teamques10 ★ 70k
0
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1
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2.6k
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1
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Explain the concept of Bistable multivibrators.
digital logic design updated 9.5 years ago by teamques10 ★ 70k
0
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1
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9.9k
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1
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Explain Astable multivibrator using op-amp with neat waveforms.
digital logic design updated 9.5 years ago by teamques10 ★ 70k
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