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4
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1
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28k
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1
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Explain carry look ahead adder and its advantages.
vlsi design updated 5.5 years ago by ankitpandey • 100
5
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1
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18k
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1
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Consider CMOS circuit with following parameters $v_{DD}=3.3v,v_{TO}=0.6v,v_{TO},p=-0.7v,K_n=200 \mu A/v^2,K_p=80 \mu A/v^2 $Calculate noise margins of the circuit consider KR=2.5
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
5
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1
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5.0k
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1
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Write Short notes on: Interconnect scaling.
vlsi design updated 5.5 years ago by ankitpandey • 100
1
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1
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588
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1
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Module 3 : Unit 2
vlsi design updated 5.4 years ago by teamques10 ★ 66k
2
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1
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5.0k
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1
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Explain clock generation techniques in integrated circuits
vlsi design updated 2.3 years ago by teamques10 ★ 66k
5
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1
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36k
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1
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Implement half adder circuit using static CMOS.
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
3
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1
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16k
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1
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Derive equation for noise margins for CMOS invertor
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
1
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1
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3.2k
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1
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Draw CLA (Carry Look Ahead adder) carry chain using dynamic CMOS logic.
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
2
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1
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5.1k
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1
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Write short notes on: Flash Memory
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
1
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1
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3.8k
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1
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Draw CLA (Carry Look Ahead adder) carry chain using Static CMOS logic.
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
9
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1
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63k
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1
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Explain READ and WRITE operation of 6-T SRAM cell in detail. OR Explain working of 6-T SRAM cell.
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
1
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1
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886
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1
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Module 3 : Unit 2
vlsi design updated 5.4 years ago by teamques10 ★ 66k
1
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1
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496
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1
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Module 6 : Unit 2
vlsi design updated 5.4 years ago by teamques10 ★ 66k
2
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1
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16k
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1
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Implement 4*4 NAND based ROM array.
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
8
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1
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41k
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1
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Explain CMOS inverter characteristics mentioning all regions of operations
vlsi design updated 2.3 years ago by mkv030481 • 30
1
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1
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750
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1
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Cross talk in integrated circuits.
vlsi design updated 2.3 years ago by DevarenjiniP • 3.1k
2
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1
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11k
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1
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Compare ripple carry adder with CLA
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
3
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1
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3.5k
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1
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Explain clock skew & describe techniques to minimize it
vlsi design updated 5.3 years ago by hetalgosavi • 1.6k
0
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1
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902
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1
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VLSI Design : Question Paper May 2012 - Electronics & Telecomm (Semester 6) | Mumbai University (MU)
vlsi design updated 7.5 years ago by teamques10 ★ 66k
0
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1
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885
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1
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Module 2 : Unit 2
vlsi design updated 24 months ago by sagarkolekar ★ 11k
0
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1
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1.0k
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1
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Basic VLSI Design : Question Paper May 2013 - Electronics Engineering (Semester 6) | Mumbai University (MU)
vlsi design updated 8.4 years ago by teamques10 ★ 66k
0
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1
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933
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1
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Basic VLSI Design : Question Paper May 2013 - Electronics Engineering (Semester 6) | Mumbai University (MU)
vlsi design updated 8.4 years ago by teamques10 ★ 66k
0
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1
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1.6k
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1
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Basic VLSI Design : Question Paper Dec 2013 - Electronics Engineering (Semester 6) | Mumbai University (MU)
vlsi design updated 8.4 years ago by teamques10 ★ 66k
0
votes
1
answer
957
views
1
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VLSI Design : Question Paper Dec 2012 - Electronics & Telecomm. (Semester 6) | Mumbai University (MU)
vlsi design updated 8.4 years ago by teamques10 ★ 66k
0
votes
1
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862
views
1
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VLSI Design : Question Paper Dec 2012 - Electronics & Telecomm. (Semester 6) | Mumbai University (MU)
vlsi design updated 8.4 years ago by teamques10 ★ 66k
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