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9
votes
1
answer
70k
views
1
answer
Explain READ and WRITE operation of 6-T SRAM cell in detail. OR Explain working of 6-T SRAM cell.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
4
votes
1
answer
48k
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1
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Define scaling. Explain significance or in in VLSI circuits. OR Define Scaling. Explain various types of scaling in detail.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
9
votes
1
answer
44k
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1
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Explain CMOS inverter characteristics mentioning all regions of operations
vlsi design updated 2.8 years ago by mkv030481 • 30
5
votes
1
answer
40k
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1
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Implement half adder circuit using static CMOS.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
0
votes
1
answer
34k
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1
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Implement 4:1 mux using pass transistor logic. Explain advantages of using transmission gates.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
4
votes
1
answer
29k
views
1
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Explain carry look ahead adder and its advantages.
vlsi design updated 6.0 years ago by ankitpandey • 100
1
vote
1
answer
29k
views
1
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Implement D flip-flop using Static CMOS. What are other design methods for it? [10] OR Draw D flipflop using CMOS and explain the working.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
0
votes
1
answer
27k
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1
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Draw JK Flip Flop using CMOS and explain the working.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
5
votes
1
answer
27k
views
1
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Write short notes on: NORA, Zipper Logic design.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
2
votes
1
answer
25k
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1
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Compare Full Scaling & Constant Voltage Scaling models of MOSFET .Demonstrate clearly the effects of scaling on the device density, speed of the circuit, power consumption and current density of the
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
6
votes
1
answer
25k
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1
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Draw 1 T DRAM cell & explain its write ,read ,hold & refresh operation
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
3
votes
1
answer
22k
views
1
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Explain transfer Characteristics for NMOS inverter showing different regions. What is the effect of variation in (W/L) ratio .
vlsi design updated 3.0 years ago by sagarkolekar ★ 11k
0
votes
1
answer
21k
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1
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Design a 2:1 MUX using transmission gates and discuss advantages of use of transmission gate logic.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
5
votes
1
answer
20k
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1
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Consider CMOS circuit with following parameters $v_{DD}=3.3v,v_{TO}=0.6v,v_{TO},p=-0.7v,K_n=200 \mu A/v^2,K_p=80 \mu A/v^2 $Calculate noise margins of the circuit consider KR=2.5
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
1
vote
1
answer
19k
views
1
answer
What is fast adder? Explain any one scheme for fast adder.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
3
votes
1
answer
19k
views
1
answer
Derive equation for noise margins for CMOS invertor
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
3
votes
1
answer
19k
views
1
answer
Implement 4*4 NAND based ROM array.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
0
votes
1
answer
17k
views
1
answer
What are advantages and disadvantages of dynamic logic circuit?
vlsi design updated 3.0 years ago by teamques10 ★ 69k
1
vote
1
answer
17k
views
1
answer
Explain pseudo NMOS logic and hence implement 2 input NAND gate.
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
0
votes
1
answer
17k
views
1
answer
Implement the following function using CMOS logic. $Y=A{\bar{B}} +{\bar{A}}{\bar{C}} + AB$ .
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
1
vote
1
answer
15k
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1
answer
Modes of Operation of MOS
vlsi design updated 8.6 years ago by sanketshingote • 100
0
votes
1
answer
15k
views
1
answer
Write short notes on: NOR based ROM array
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
5
votes
1
answer
13k
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1
answer
What is ESD protection? Explain with example
vlsi design updated 5.8 years ago by hetalgosavi • 1.7k
4
votes
1
answer
13k
views
1
answer
Write Short notes on: 4*4 Barrel Shifter. (Improvise)
vlsi design updated 6.0 years ago by abhishektiwari1 • 100
1
vote
1
answer
12k
views
1
answer
Write Short notes on: Level-1 and Level-2 MOS Models OR Explain Level 1 and Level 2 MOSFET model used in circuit simulation
vlsi design updated 6.0 years ago by abhishektiwari1 • 100
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